One of the biggest issues in doing testing for Serial RapidIO designs is getting access to the signal. Space requirements and lack of proper access points make testing difficult, if not impossible. It's important to understand the options available when connecting to a signal, as one solution will not work for every type of design. This article presents 3 options to consider when designing your board.
The Serial RapidIO technology is expanding into many industries using embedded designs such as medical instruments, communications and the military sectors. In all these industries, space and signal access for debugging is a major challenge. Space constraints impose constraints on space to facilitate test and debug tasks for any given design. Without the correct type of probe, designers connect test equipment to debug the protocol exchanges easily. This article presents 3 types of solutions to help in designing your board and system for maximum testability.
One thing to remember before laying out your board is design for testability must be considered as early as possible in the PCB design cycle. For example, if you decide on using a mid bus probe to use for your testing, it obviously has to be incorporated into the PCB layout before routing.
Below are the 3 options to consider for Serial RapidIO testability.
1. Mid Bus Probe: Mid bus probes come in full or half sizes. The half-size mid-bus probe is helpful for width designs up to x4, where layout constraints make it difficult to insert a full-size connector footprint. If you have more than 4 lanes, your only choice is a full size connector. In either case, monitoring the signal becomes simple, as all you need to do is plug in your test equipment into the connector.
One thing to note is the traces on the connector can be laid out one of two ways, depending upon the type of testing you need done. You can either lay the traces out in a straight pass through fashion, where the mid bus connector simply taps into the signal. The other option is to use a "jumper" configuration, where the signal on one side of the connector passes through the test equipment before returning to the other side of the connector. This type of jumper configuration allows the test equipment to either drive traffic to the line or inject errors to test reliability, and is useful during the development phase of your device.
Figure 1 - Mid bus probe
2. Flying leads: Flying leads is one choice for a space constrained system. Using this type of monitoring will reduce routing complexity and simplifies the board layout. Test points must still be incorporated into the layout, but the flexibility in placing those test points will create access to the signal which would have otherwise been impossible with a mid bus probe.
Figure 2 - Flying leads
3. Interposer Cards: This is a good alternative if your design has multiple cards running through a backplane, and space is tight not only on your boards, but within your system. This option, similar to the mid bus probe, must be designed into the PCB early in the layout, so the connector can be properly placed.
Figure 3 - Interposer card
With SRIO speeds at a maximum 10 Gpbs, reliable non-intrusive probing becomes even more important. Data capture becomes difficult if not impossible without a preplanned probing strategy.
Absolute Analysis understands that probing is key to enable reliable monitoring and debugging of the Serial RapidIO or other backplane link. With support for the mid-bus probe, flying leads, and interposer card, Absolute Analysis provides a comprehensive probing solution for Serial RapidIO verification. Our extensive probing capabilities are combined with a powerful multi-protocol analyzer, InvestigatorTM, that provides full mixed protocol analysis, traffic generation, error injection, and BER testing all within the same hardware. This solution is the most versatile test platform for Serial RapidIO verification.
