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Unrivaled Capability to Ensure Error Free Serial FPDP Links Running at Optimum Performance


serial_fpdp_bent_with_reflectionThe Absolute Analysis Investigator™ Serial Front Panel Data Port (sFPDP) Analyzer shows each and every network event in easy to read and comprehend displays.

Decodes allows users to see the full frame structure including sync, flow control, start and end-of-frame, and CRC settings.

User data can be decoded into readable fields using the optional Investigator™ Protocol Editor, further enhancing Investigator's reputation for unrivaled performance in high-speed data capture, decode and analysis.

Features

  • Easy-to-use, consistent point and click, drag and drop windows-based GUI
  • Customizable and configurable database decodes above sFPDP
  • Captures over a million frames per port into large capture buffers
  • Multiple lane support with cross-lane triggering
  • Trigger, filter and decode on standard and user-defined protocols
  • Independent filters on each lane with bit-level control
  • Timestamp synchronize all ports to a single common reference clock
  • Traffic Generation, Protocol Analysis, BERT, and Statistics on each port
  • Standard and non-standard speeds (e.g. 8.5Gbps, 10Gbps)

Benefits

  • Capture 100% of link traffic at full-line rate
  • Monitor multiple network points and aggregated links
  • Users can implement their own decodes above sFPDP
  • Automatically decode all link traffic, including SWDV, STOP/GO and other ordered sets
  • VITA 17.1 and Vita 17.2 compliance assurance
  • Performance statistics for optimized system

Additional Absolute Analysis Investigator™ Serial FPDP Analyzer Capabilities


Link Speeds 1.0625, 2.125, 2.50, 3.125, and 4.25Gbps
Physical Interface

850nm multimode (standard), 1310nm single mode (optional), 1550nm single mode (optional), DB-9       copper (optional), HSSDC copper (optional), HSSDC2 copper (optional). Other interfaces upon request.

Number of Ports Four ports per Interface Card. (Capable of analyzing four links or two bi-directional links.)
Maximum Ports per  Chassis Up to 32 (depending upon on platform choice.)
Maximum Capture Buffer Size 1GB per port. 4GB per Interface Card.
Capture Buffer Configuration 32MB, 64MB, 128MB, 512MB, and 1024MB per port portions
Link Status Indication No SFP, Faulty SFP, loss of sync, link errors, and link up
Triggers Multi-state, multi-level trigger sequencer. Trigger on sequence of events on any number of links.
Trigger Depth 32 states per sequencer
Counters and Timers 32 counters and timers per sequencer
Combinations 'OR' conditions between pattern matchers
External Trigger In/Out One external trigger in and one external out per interface card
Filters Eight 32-byte pattern matchers (primitives or frames) with associated local occurance counters
Frame Slicing Any distance into the frames ending on a word (4-byte) boundary
Error Detection Disparity error, code violation, CRC error, and loss of sync
Timestamp Resolution 10ns (actual), 0.1 (interpolated)
Timestamp Options Elapsed time since start of trace, relative time to previous event, real time of day (local time), and UTC time.

 

Compatible Configuration


Investigator’s Serial FPDP tools are completely integrated with all other Absolute Analysis solutions to form a flexible, unified, scalable, and upgradeable architecture. This facilitates multi-protocol testing across devices bridging Serial FPDP and other protocols.

 

Platforms

Absolute Analysis Investigator™ products are available in several platforms, from highly portable to notebooks to high port count rack mounts. Choose from the following systems or contact us for a custom system designed specifically to meet your needs.


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